help for cs subject

[Esha Naeem 0]

Question No. 1: (5 marks)
Assume, in a network, a switch runs for a very long time and it is used to share a link between the 4 concurrent connected connections i.e. W, X, Y and Z whose packets arrive in bursts. The link’s data rate is 1 packet per time slot. The average packet arrival rates of W, X, Y and Z in packets per time slot, are 0.4, 0.1, 0.3 and 0.2 respectively. The average delays observed at the switch are 5, 5, 10 and 10. Calculate the average queue lengths of the 4 queues (W through Z) at the switch.

Note: Calculation steps are necessary to be shown.

Question No 2: (5 marks)

For P = 1011 and M = 1101000, find the CRC (Cyclic Redundancy Check).

Note: Calculation steps are necessary to be shown.

[zaasmi]

@esha-naeem-0 said in Cs 432 assignment 3 solution require:

Assume, in a network, a switch runs for a very long time and it is used to share a link between the 4 concurrent connected connections i.e. W, X, Y and Z whose packets arrive in bursts. The link’s data rate is 1 packet per time slot. The average packet arrival rates of W, X, Y and Z in packets per time slot, are 0.4, 0.1, 0.3 and 0.2 respectively. The average delays observed at the switch are 5, 5, 10 and 10. Calculate the average queue lengths of the 4 queues (W through Z) at the switch.
Note: Calculation steps are necessary to be shown.

Using Little’s Law: N = λ*D, so you can get the right answer

[zaasmi]

@esha-naeem-0 said in Cs 432 assignment 3 solution require:

For P = 1011 and M = 1101000, find the CRC (Cyclic Redundancy Check).

Example
Error Detection
15th of September, 2015
Over more reliable channels there is no need to replicate data for error correction, instead it may be more efficient just to identify errors and resend the data.
Error Detection Parity
The first error detection algorithm is the parity algorithm. Parity algorithms can split the data in to words and keep a parity bit for each position in the word. We could split our data into bytes and keep a parity byte. Unlike error correction, one parity byte is all that is needed for any length of data.

The parity scheme does not identify errors which change two bits (only even/odd). Our parity scheme would fail if a column contained only one 1 but was changed to three 1s.
Checksums
Checksums are a natural extension of parity bits and divide the data into words. A simple checksum algorithm would store the number of 1s in each column. This algorithm would eliminate the even/odd situation. Other checksum algorithms count all of the 1s together using one’s-complement addition. In one’s-complement the high bits will wrap around to the low bits on a carry or borrow. When would checksums fail?
1
CMSC 360 Fall 2015 Dymacek
Cyclic Redundancy Checks
Cyclic Redundancy Checks (CRC) work by treating the data as a polynomial and dividing by a generator polynomial. The CRC is the remainder after dividing the data by the generator. If the generator is of n length we first add n − 1 0s to the data. Before sending the data the CRC is appended to the end, if the received data has a remainder of zero there are no errors.
A polynomial code with r check bits will detect all burst errors of length ≤ r. There are many CRC generator, most famously the IEEE 802 CRC: x32 + x26 + x23 + x22 + x16 + x12 +x11 +x10 +x8 +x7 +x5 +x4 +x2 +x1 +1. The IEEE CRC will detect all burst errors ≤ 32 bits and all burst errors affecting an odd number of bits. Remember that the generator polynomial has 33 terms so that the remainder can be 32 bits.

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[Esha Naeem]

how to solve using this N = λ*D

[cyberian]

@esha-naeem said in Cs 432 assignment 3 solution require:

how to solve using this N = λ*D

Please check following Example

Consider a switch that uses time division multiplexing (rather than statistical multiplexing) to share a link between four concurrent connections (A, B, C, and D) whose packets arrive in bursts. The link’s data rate is 1 packet per time slot. Assume that the switch runs for a very long time.

The average packet arrival rates of the four connections (A through D), in packets per time slot, are 0.2, 0.2, 0.1, and 0.1 respectively. The average delays observed at the switch (in time slots) are 10, 10, 5, and 5. What are the average queue lengths of the four queues (A through D) at the switch?

With TDMA, each connection gets to send 1 packet every 4 time slots, or .25 packets/slot. And with TDMA, the behavior of each connection is independent of what’s happening on the other connections. All of the arrival rates are less than this number, so the queue lengths are bounded.

Using Little’s Law: N = λ*D, so

A: N = 0.2 * 10 = 2 packets
B: N = 0.2 * 10 = 2 packets
C: N = 0.1 * 5 = .5 packets
D: N = 0.1 * 5 = .5 packets

Connection A’s packet arrival rate now changes to 0.4 packets per time slot. All the other connections have the same arrival rates and the switch runs unchanged. What are the average queue lengths of the four queues (A through D) now?